010-057 Compaq - Braindumps.com.ua: question list for "Dump for certification exam Compaq 010-057", page: 1

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Compaq 010-057: Dump for certification exam Compaq 010-057

#1. During a Processor to Cache вЂњburstвЂќ transfer, data is transferred:

#2. The amount of memory a Microprocessor can address is based on the :

#3. The Maximum Data transfer rate of a 256-bit Memory bus on a System using a 266 Mhz CPU is :

#4. Which is not a feature of a Pentium Processor ?

#5. Which is not a feature of the Pentium II Processor ?

#6. The L2 cache of a 180 Mhz Pentium Pro Processor operates at

#7. Which cache architecture is the most appropriate for a server using multiple bus master devices

#8. Which Cache architecture has the smallest Look-up penalty

#9. Which Cache architecture offers the greatest flexibility for data storage

#10. What is the term applied to the amount of time that elapses after a memory read has been performed and before the next read can be performed , because of a refresh cycle

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Compaq 010-057

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